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   semiconductor technical data 31 rev 2 ? motorola, inc. 1996 12/93   
 
 the mc10/100el34 is a low skew 2, 4, 8 clock generation chip designed explicitly for low skew clock generation applications. the internal dividers are synchronous to each other , therefore, the common output edges are all precisely aligned. the device can be driven by either a differential or single-ended ecl or , if positive power supplies are used, pecl input signal. in addition, by using the v bb output, a sinusoidal source can be ac coupled into the device (see interfacing section of the eclinps ? data book dl140/d). if a single-ended input is to be used, the v bb output should be connected to the clk input and bypassed to ground via a 0.01 m f capacitor . the v bb output is designed to act as the switching reference for the input of the el34 under single-ended input conditions, as a result, this pin can only source/sink up to 0.5ma of current. the common enable (en ) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the low state. this avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. an internal runt pulse could lead to losing synchronization between the internal divider stages. the internal enable flip-flop is clocked on the falling edge of the input clock, therefore, all associated specification limits are referenced to the negative edge of the clock input. upon startup, the internal flip-flops will attain a random state; the master reset (mr) input allows for the synchronization of the internal dividers, as well as multiple el34s in a system. ? 50ps output-to-output skew ? synchronous enable/disable ? master reset for synchronization ? 75k w internal input pulldown resistors ? >1000v esd protection v cc logic diagram and pinout assignment q0 q1 v cc q2 15 16 14 13 12 11 10 2 1 3 4 5 6 7 v cc 9 8 q2 q0 en nc clk clk v bb mr v ee d q r q r 2 q r 4 q r 8 q1 
  
  pin function clk diff clock inputs en sync enable mr master reset v bb reference output q 0 diff 2 outputs q 1 diff 4 outputs q 2 diff 8 outputs pin description clk z zz x en l h x mr l l h function divide hold q 03 reset q 03 function table z = low-to-high transition zz = high-to-low transition d suffix plastic soic package case 751b-05 1 16
mc10EL34 mc100el34 motorola eclinps and eclinps lite dl140 e rev 3 32 ac/dc characteristics (v ee = v ee (min) to v ee (max); v cc = gnd) 40 c 0 c 25 c 85 c symbol characteristic min typ max min typ max min typ max min typ max unit f max max toggle frequency 1100 1100 1100 1100 mhz i ee power supply 10el current 100el 39 39 39 39 39 39 39 42 ma v bb output reference 10el voltage 100el 1.43 1.38 1.30 1.26 1.38 1.38 1.27 1.26 1.35 1.38 1.25 1.26 1.31 1.38 1.19 1.26 v i ih input high current 150 150 150 150 ma t plh t phl propagation clk q0 delay to clk q1,2 output mr q 960 900 750 1200 1140 1060 960 900 750 1200 1140 1060 960 900 750 1200 1140 1060 970 910 790 1210 1150 1090 ps t skew within-device skew 100 100 100 100 ps t s setup time en 400 400 400 400 ps t h hold time en 250 250 250 250 ps v pp minimum input swing clk 250 250 250 250 mv v cmr common mode range clk 2.0 0.4 2.0 0.4 2.0 0.4 2.0 0.4 v t r t f output rise/fall times q (20% 80%) 275 525 275 525 275 525 275 525 ps figure 1. timing diagram clk q0 q1 q2 en the en signal will freeze the internal clocks to the flipflops on the first falling edge of clk after its assertion. the internal dividers will maintain their state during the internal clock freeze and will return to clocking once the internal clocks are unfrozen. the outputs will transition to their next states in the same manner, time and relationship as they would have had the en signal not been asserted. internal clock disabled internal clock enabled
mc10EL34 mc100el34 33 motorola eclinps and eclinps lite dl140 e rev 3 outline dimensions d suffix plastic soic package case 751b-05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 1 8 16 9 seating plane f j m r x 45  g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019     motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation consequential or incidental damages. at ypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including at ypicalso must be validated for each customer application by customer ' s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur . should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. how to reach us: usa/europe/locations not listed : motorola literature distribution; japan : nippon motorola ltd.; tatsumispdjldc, 6f seibubutsuryucenter, p.o. box 20912; phoenix, arizona 85036. 18004412447 or 6023035454 3142 tatsumi kotoku, tokyo 135, japan. 038135218315 mfax : rmf ax0@email.sps.mot.com t ouchtone 6022446609 asia/pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, internet : http://designnet.com 51 ting kok road, tai po, n.t., hong kong. 85226629298 mc10EL34/d  
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